Assignment 3

Assigned: Thursday, September 8

Due: Wednesday, September 14 at the beginning of class

Submitting your work: Please turn in your work at the beginning of class. Assignments can be typed and printed, or neatly hand-written.

Problem 1: Logical Formulas

Reduce the following boolean formulas using Karnaugh maps. Show your work, and include a final reduced boolean expression in sum-of-products form.

a. $A(B(C+\overline{D})+\overline{C})$

b. $\overline{A}BC+A\overline{B}C+AB\overline{C}$

c. $A(B+\overline{C}+C+\overline{D})(\overline{B}+C)$

d. Draw a PLA that implements your reduced expression for part a. You may draw the full logical circuit, or use the shorthand we discussed in class.

Problem 2: Combinational Logic

a. Implement a two bit decoder using logic gates (not transistors). You may draw your circuit by hand, or you can export an image from Logisim and include it here.

b. Implement a four-input multiplexor using logic gates (not transistors). You may draw your circuit by hand, or you can export an image from Logisim and include it here.

c. Implement a full adder using logic gates (not transistors). You may draw your circit by hand, or you can export an image from Logisim and include it here. Remember that a full adder has inputs A, B, and carry_in, and outputs sum and carry_out.