Assigned: Wednesday, September 21
Due: Wednesday, September 28 by 10:30pm
Submitting your work: Please submit this assignment by email.
This assignment should be a learning experience for everyone on the team, so do not “divide and conquer.” You should use pair programming as you build circuits. Work submitted by your team must be your team’s work. You may discuss your design with other groups, but you may not share or show your circuit files for any of the exercises.
Please build your circuit in the starter file.
Please submit your work via email with the subject [CSC 211.01] Assignment 5. Only submit one time for each group. You should attach the file registers.circ containing your implementation for both problems.
In the subcircuit called 4-bit register, build a four-bit register from four D flip-flops. Use Logisim’s build-in D flip-flop components, which are available in the explorer pane’s “Memory” category. Your four bit register must have the following inputs and outputs:
output (4 bits)data (4 bits)write_enable (1 bit)data input should be written to the register on a falling clock edge.clock (1 bit)Writing to the register should be controlled by the clock signal with write_enable connected to the flip-flop’s “Enable” pin en (on the bottom of the flip-flop). The value from data should be stored on the falling clock edge, only when write_enable is high. Logisim defaults to rising-edge flip-flops, so you will need to change this in the flip-flop’s attribute panel.
In the subcircuit 4x4 register, build a register file consisting of four 4-bit registers. The register file has the following inputs and outputs:
data (4 bits)write indexoutput (4 bits)read indexread (2 bits)outputwrite (2 bits)write_enable is setwrite_enable (1 bit)data should be written to the register specified by the write index.clock (1 bit)This assignment, written in collaboration with Jerod Weinman, is derived from work by Janet Davis and is used under the Creative Commons Attribution-Noncommercial-Share Alike 3.0 United States License.