HW 5 - Power and Performance
Due at 10:30pm on Wednesday, October 7, 2015

Submitting your work: Submit your assignment via email with the subject [CSC 211.01] Assignment 5.
Collaboration: Unlike previous assignments, you must complete this assignment individually. You may discuss your methods for solving problems on the assignment with other students in the class, but do not share your answers.
Acknowledgements: This assignment is based on Janet Davis’ assignment 5 from spring, 2013. Problems 1–4 are adapted from Patterson & Hennessy (2009). Some information is sourced from Wikipedia.

Problem 1: Bits and bytes [10 points]

A standard resolution for digital video is 2048 x 1080 pixels per frame. Each pixel is represented in the CIE XYZ color space using 12 bits per component, or 36 bits per pixel. A standard frame rate is 24 frames per second.

How many bytes are required to store a single frame of video in this format?
How much memory is required to store one second of data?
How much memory is required to store a two hour movie?
If a server is connected to 1 Gbps Ethernet (1 Gbps = 1 billion bits per second), how many frames per second can it stream? You may assume that 100% of the network bandwidth is available to transmit the video.

Problem 2: Instruction mix [10 points]

Supposed that a 4GHz processor has four classes of instructions: Compute, Load, Store, and Branch. The following table shows the number of cycles required to execute each class of instruction, as well as the number of instructions of each type executed by some program.

	Compute	Load	Store	Branch
Cycles per instruction	1	5	5	2
Instruction count	500	100	50	50

How long does it take to run this program on this processor?
What is the overall CPI for the program?
If a clever programmer can cut the number of load instructions in half, by what factor would performance improve?

Problem 3: Performance fallacies [10 points]

Consider the following data for the execution of a given instruction sequence of $10^6$ instructions on two different processors implementing the same instruction set.

Processor	Clock rate	CPI
A	4GHz	1.25
B	3GHz	0.75

One common fallacy is to assume processors with faster clock speeds have better performance. Check if this is true for processors A and B.
Another fallacy is to expect that the processor executing a larger number of instructions will take more time. How many instructions can processor B run in the time it takes A to run $10^6$ instructions?
Another fallacy is to use MIPS—the maximum number of instructions (in millions) that a processor can run in one second—to compare the performance of two different processors. Compute the MIPS for both processors above. Does the processor with a higher MIPS have better performance?

Problem 4: Power vs. speedup on parallel processors [10 points]

Assume that a given program can be parallelized to run on 1, 2, 4, or 8 cores, but running the program in parallel requires some additional instructions to coordinate across cores. The table below shows the number of instructions that must be executed on each core for a given number of cores.

Cores	Instructions per core
1	$$1 \times 10^{10}$$
2	$$6 \times 10^9$$
4	$$4 \times 10^9$$
8	$$3 \times 10^9$$

Assuming a 4GHz clock frequency and an average CPI of 1.2, what is the program execution time in each scenario?
Recall that the power consumption of a processor core is $\text{P} = C \cdot V^2 \cdot f$ , where $P$ is power in Watts, $C$ is capacitance in Coulombs per Volt, $V$ is voltage, and $f$ is frequency in Hertz. Find the cumulative power consumption of the program in each scenario, assuming that each core runs at 4GHz, has a capacitance of $2 \times 10^{-9} \dfrac{C}{V}$ , and has a voltage of $1.75V$ .
Suppose we “downgrade” the system to 2GHz processors. What is the program execution time and power consumption in each scenario now?

Problem 5: Trading parallelism for clock speed [10 points]

Nearly all of the power consumed by a processor is turned into heat, which is also measured in Watts. The rate at which this heat can be dissapated, the TDP (thermal design power), is determined by the physical size of the processor the heat sink attached to it. Increasing a processor’s frequency increases its power consumption and therefore its heat output.

The Intel Xeon E5-2640 v3 processor has eight cores, a TDP of 90W, and operates at 2.6GHz (according to Intel’s specifications). This processor has a feature that allows it to run at higher clock speeds when some cores are inactive, as long as the total power consumption is below the TDP.

If we assume that an idle core consumes no power, what frequencies could this processor support with just one, two, or four active cores? You may assume that the processor consumes exactly its 90W when running at 2.6GHz with all eight cores active.
The maximum sustained frequency for this processor is actually 3.2GHz with just one core enabled. This means idle cores must consume some power. Solve for the power consumption of active and idle cores at 2.6GHz. Do not forget to account for the increased power consumption of both active and idle cores when the processor is running at a higher frequency. You may assume both active and idle cores run at the same frequency.

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